High-Performance On-Chip Network Platform for Memory-on-Processor Architectures

Year of publication

2011

Authors

Daneshtalab, Masoud;Ebrahimi, Masoumeh;Liljeberg, Pasi;Plosila, Juha;Tenhunen, Hannu

Organizations and authors

University of Turku

Tenhunen Hannu

Plosila Juha

Daneshtalab Masoud

Ebrahimi Masoumeh

Liljeberg Pasi

Publication type

Publication format

Article

Parent publication type

Conference

Article type

Audience

Scientific

Peer-reviewed

Peer-Reviewed

MINEDU's publication type classification code

A4 Article in conference proceedings

Publication channel information

Journal/Series

International workshop on Reconfigurable Communication-centric Systems-on-Chip

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Volume

NNNN

Issue

NNNN

Pages

41000

ISBN

978-1-4577-0640-0

Publication forum

72429

Publication forum level

Open access

Open access in the publisher’s service

No information

Self-archived

Unknown

Other information

Fields of science

Computer and information sciences; Electronic, automation and communications engineering, electronics

Publication country

France

Language

English

International co-publication

Co-publication with a company