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Fault-tolerant programmable logic array for nanoelectronics

Year of publication

2012

Authors

Flak, Jacek; Laiho, Mika

Organizations and authors

VTT Technical Research Centre of Finland Ltd

Flak Jacek Orcid -palvelun logo

Publication type

Publication format

Article

Parent publication type

Journal

Article type

Original article

Audience

Scientific

Peer-reviewed

Peer-Reviewed

MINEDU's publication type classification code

A1 Journal article (refereed), original research

Publication channel information

Journal/Series

International Journal of Circuit Theory and Applications

Volume

40

Issue

12

Pages

1233-1247

ISSN

0098-9886

​Publication forum

58301

​Publication forum level

1

Open access

Open access in the publisher’s service

No

Self-archived

No

Other information

Fields of science

Electronic, automation and communications engineering, electronics

Keywords

[object Object],[object Object],[object Object],[object Object],[object Object]

Language

English

International co-publication

No

Co-publication with a company

No

DOI

10.1002/cta.1795

The publication is included in the Ministry of Education and Culture’s Publication data collection

Yes